/*
 * Copyright 2010 - 2011, The PLDesktop Development Team
 *
 *  This library is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU Lesser General Public
 *  License as published by the Free Software Foundation; either
 *  version 2.1 of the License, or (at your option) any later version.
 *
 *  This library is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
 *  Lesser General Public License for more details.
 *
 *  You should have received a copy of the GNU Lesser General Public
 *  License along with this library; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */

#ifndef PLVIRTUAL_PAGE_MANAGER_H
#define PLVIRTUAL_PAGE_MANAGER_H

#include <stddef.h>
#include <machine/pc/memory/virtualpageinterface.h>
#include <machine/pc/processor/processor.h>

/**
 * Virtual memory manager.
 */
class PLVirtualPageManager {
public:
	/**
	 * The flags that can be set in the page directory.
	 */
	enum PageDirectoryFlags {
		/**
		 * P, or 'Present', determines if the page is actually in physical memory at the moment.
		 * For example, when a page is swapped out, it is not in physical memory and therefore
		 * not 'Present'. If a page is called, but not present, a page fault will occur, and
		 * the OS should handle it.
		 */
		PageDirectoryPresent			= 1 << 0,
		/**
		 * R, the 'Read/Write' permissions flag. If the bit is set, the page is read/write. Otherwise
		 * when it is not set, the page is read-only. The WP bit in CR0 determines if this is only
		 * applied to userland, always giving the kernel write access (the default) or both userland
		 * and the kernel (see Intel Manuals 3A 2-20).
		 */
		PageDirectoryReadWrite		= 1 << 1,
		/**
		 * U, the 'User\Supervisor' bit, controls access to the page based on privilege level.
		 * If the bit is set, then the page may be accessed by all; if the bit is not set, however,
		 * only the supervisor can access it.
		 */
		PageDirectoryUser				= 1 << 2,
		/**
		 * W, the controls 'Write-Through' abilities of the page. If the bit is set, write-through
		 * caching is enabled. If not, then write-back is enabled instead.
		 */
		PageDirectoryWriteThrough	= 1 << 3,
		/**
		 * D, is the 'Cache Disable' bit. If the bit is set, the page will not be cached. Otherwise,
		 * it will be.
		 */
		PageDirectoryNotCache		= 1 << 4,
		/**
		 * A, or 'Accessed' is used to discover whether a page has been read or written to. If it has,
		 * then the bit is set, otherwise, it is not. Note that, this bit will not be cleared by the
		 * CPU, so that burden falls on the OS (if it needs this bit at all).
		 */
		PageDirectoryAccessed		= 1 << 5,
		/**
		 * S, or 'Page Size' stores the page size for that specific entry. If the bit is set, then
		 * pages are 4 MiB in size. Otherwise, they are 4 KiB. Please note that for 4 MiB pages PSE
		 * have to be enabled.
		 */
		PageDirectoryPageSize		= 1 << 7,
		/**
		 * The Global, or 'G' above, flag, if set, prevents the TLB from updating the address in it's
		 * cache if CR3 is reset. Note, that the page global enable bit in CR4 must be set to enable
		 * this feature. (This was ignored in the page directory)
		 */
		PageDirectoryGlobal			= 1 << 8
	};
	/**
	 * The flags that can be set in the page table.
	 */
	enum PageTableFlags {
		/**
		 * P, or 'Present', determines if the page is actually in physical memory at the moment.
		 * For example, when a page is swapped out, it is not in physical memory and therefore
		 * not 'Present'. If a page is called, but not present, a page fault will occur, and
		 * the OS should handle it.
		 */
		PageTablePresent			= 1 << 0,
		/**
		 * R, the 'Read/Write' permissions flag. If the bit is set, the page is read/write. Otherwise
		 * when it is not set, the page is read-only. The WP bit in CR0 determines if this is only
		 * applied to userland, always giving the kernel write access (the default) or both userland
		 * and the kernel (see Intel Manuals 3A 2-20).
		 */
		PageTableReadWrite		= 1 << 1,
		/**
		 * U, the 'User\Supervisor' bit, controls access to the page based on privilege level.
		 * If the bit is set, then the page may be accessed by all; if the bit is not set, however,
		 * only the supervisor can access it.
		 */
		PageTableUser				= 1 << 2,
		/**
		 * W, the controls 'Write-Through' abilities of the page. If the bit is set, write-through
		 * caching is enabled. If not, then write-back is enabled instead.
		 */
		PageTableWriteThrough	= 1 << 3,
		/**
		 * D, is the 'Cache Disable' bit. If the bit is set, the page will not be cached. Otherwise,
		 * it will be.
		 */
		PageTableNotCache			= 1 << 4,
		/**
		 * A, or 'Accessed' is used to discover whether a page has been read or written to. If it has,
		 * then the bit is set, otherwise, it is not. Note that, this bit will not be cleared by the
		 * CPU, so that burden falls on the OS (if it needs this bit at all).
		 */
		PageTableAccessed			= 1 << 5,
		/**
		 * If the Dirty flag ('D') is set, then the page has been written to. This flag is not
		 * updated by the CPU, and once set will not unset itself.
		 */
		PageTableDirty				= 1 << 6,
		/**
		 * The Global, or 'G' above, flag, if set, prevents the TLB from updating the address in it's
		 * cache if CR3 is reset. Note, that the page global enable bit in CR4 must be set to enable
		 * this feature.
		 */
		PageTableGlobal			= 1 << 8
	};
public:
	/**
	 * Constructor.
	 */
	PLVirtualPageManager();
	/**
	 * Init the virtual memory management.
	 * This also create the page directory for the kernel and set it as
	 * the curent page directory.
	 */
	void init();
	/**
	 * Create the virtual address mapping for the from kernel mapped
	 * memmory.
	 */
	void createKernelVirtualAddresses();
	/**
	 * Set the current page directory to another page directory.
	 *
	 * @param newCurrentPageDirectory The new current page directory.
	 */
	inline void setCurrentPageDirectory(uint32_t *newCurrentPageDirectory);
	/**
	 * Get the physical address of a virtual address.
	 *
	 * @param virtualaddr The virtual address to get the physical address for.
	 * @return The resulting physical address.
	 */
	inline void *getPhysicalAddress(void *virtualaddr);
	/**
	 * Map a physical page to a virtual address.
	 *
	 * @param physaddr Physical address.
	 * @param virtualaddr Virtual address to map to.
	 * @param flagsTable Flags for the table.
	 */
	inline void mapPage(void *physaddr, void *virtualaddr, int flagsTable);
	/**
	 * Set other flags for the virtual address.
	 *
	 * @param virtualaddr The virtual address to set.
	 * @param flagsTable The new flags to set.
	 */
	inline void setFlags(void *virtualaddr, int flagsTable);
	/**
	 * Get the page size for the current virtual memory management.
	 *
	 * @return The page size.
	 */
	inline int pageSize();
	/**
	 * Set a address as active paging directory.
	 *
	 * @param address The address to set.
	 */
	void setPageDirectory(uint32_t address);
	/**
	 * The current page directory.
	 *
	 * @return The address of the current directory.
	 */
	inline uint32_t pageDirectory();
	/**
	 * Start paging.
	 */
	inline void startPaging();
	/**
	 * Stop paging.
	 */
	void stopPaging();
	/**
	 * flush the paging cache.
	 */
	void flushPageCache() const;
private:
	uint32_t *m_currentPageDirectory;
	PLVirtualPageInterface *m_pagingMethode;
};

void PLVirtualPageManager::setCurrentPageDirectory(uint32_t *newCurrentPageDirectory) {
	m_currentPageDirectory = newCurrentPageDirectory;
}

uint32_t PLVirtualPageManager::pageDirectory() {
	return (uint32_t)m_currentPageDirectory;
}

void *PLVirtualPageManager::getPhysicalAddress(void *virtualaddr) {
	return m_pagingMethode->getPhysicalAddress(virtualaddr);
}

void PLVirtualPageManager::mapPage(void *physaddr, void *virtualaddr, int flagsTable) {
	m_pagingMethode->mapPage(physaddr, virtualaddr, flagsTable);
}

void PLVirtualPageManager::setFlags(void *virtualaddr, int flagsTable) {
	m_pagingMethode->setFlags(virtualaddr, flagsTable);
}

int PLVirtualPageManager::pageSize() {
	return m_pagingMethode->pageSize();
}

void PLVirtualPageManager::startPaging() {
	PLProcessor::instance().setControlRegister0(PLProcessor::CR0Paging);
}

#endif
